Device Map for Nios II on the DE1-SoC Computer

There are links to two sets of documentation. Those on the DESL website tend to be longer and more easily understandable, with examples. Altera's documentation is more concise and more complete, including devices that are rarely used. The DESL documentation is currently being updated, as the address ranges have changed, and the Timer clock frequency has increased from 50 MHz to 100 MHz.

DeviceAdress rangeIRQDESL DocAltera Manual
64 MB SDRAM00000000 - 03FFFFFF2.3.1
1 GB DDR3 SDRAM40000000 - 7FFFFFFF2.3.2
LEDs (red)FF200000 - FF20000FDESL2.4.1
Seven-segment display HEX3-HEX0FF200020 - FF20002FDESL2.4.2
Seven-segment display HEX5-HEX4FF200030 - FF20003FDESL2.4.2
Slider switchesFF200040 - FF20004FDESL2.4.3
Push buttonsFF200050 - FF20005F1DESL2.4.4
JP1 Expansion headerFF200060 - FF20006F11DESL2.4.5
JP2 Expansion headerFF200070 - FF20007F12DESL2.4.5
Lego ControllerFF200060 - FF20006F
FF200070 - FF20007F		11
12		DESL2.4.5
HEX KeypadFF200060 - FF20006F
FF200070 - FF20007F		11
12		DESL2.4.5
PS/2 keyboard/mouse 1FF200100 - FF2001077DESL4.5
PS/2 keyboard/mouse 2FF200108 - FF20010F23DESL4.5.1
JTAG UARTFF201000 - FF2010078DESL2.5
IrDA Infrared serial portFF201020 - FF20102794.6
Timer 1 (per core, 100 MHz)FF202000 - FF20201F0DESL2.6
Timer 2 (per core, 100 MHz)FF202020 - FF20203F2DESL2.6
VGA Pixel buffer DMA controlFF203020 - FF20302FDESL4.2.2
VGA Character buffer DMA controlFF203030 - FF20303F4.2.2
Pixel buffer (256 KB SRAM)08000000 - 0803FFFFDESL4.2.1
Character buffer (8 KB SRAM)09000000 - 09001FFFDESL4.2.3
Audio In/Out CODECFF203040 - FF20304F6DESL4.1
Video input DMA controlFF203060 - FF20306FDESL4.3
Video input edge detectionFF203070 - FF20307FDESL4.3
ADC (JP15)FF204000 - FF20401F4.7
AVConfigFF203000 - FF20300F4.4
AccelerometerFFC04000 - FFC03FFF2.7