Altera provides a hardware system called the DE1-SoC Computer for DE1-SoC boards. At the heart of this system is a Nios II microprocessor that connects to most of the peripherals on the board.. The Nios II is a microprocessor designed by Altera specifically for implementation on FPGA devices. The DE1-SoC Computer is loaded on the DE1-SoC boards by the Altera Monitor Program, available as part of the University Program installation.
Below is the list of board peripherals used by the Nios II system for DE1-SoC
| 10 - Red LEDs |
| 6 - 7-segment Digits |
| 10 - Slide Switches |
| 4 - Push-buttons |
| 64MB SDRAM |
| 1 GB DDR3 SDRAM |
| JTAG UART |
| IrDA Infared serial port |
| 2 - timers |
| Pixel buffer |
| Character buffer |
| Accelerometer |
| Audio Codec |
| PS/2 port |
| 2 - 40-pin Expansion Headers |